Details only a geek could love
Referring to FIGS. 3A and 3B, a first embodiment of the invention is shown in which a two layer PCB includes first layer 300 (FIG. 3A) and second layer 350 (FIG. 3B). First layer 300 includes repeated column regions 302-308; void regions 310-322, EMI ground grid regions 324-328 and vias 330-346.
Second layer 350 includes repeated row regions 352-354, isolated plate regions 356-378, EMI ground grid regions 380-384 and vias 386-399. When the vias of layer 300 (330-346) and layer 350 (386-399) are aligned it can be seen that: row regions 352 and 354 align with void regions 310-322; isolated plate regions 356-378 align with column regions 304-308 and layer 300's EMI ground grid regions 324-328 run substantially orthogonal to layer 350's EMI ground grid regions 380-384. During fabrication, vias in layer 300 are electrically coupled to their corresponding vias in layer 350 to form an electrically continuous EMI ground grid interposed between (and around) the sensor's capacitive plates (302-308, 352, 354 and 356-378).
Referring to FIGS. 4A and 4B, a second embodiment of the invention is shown in which a four layer PCB includes first layer 400 (FIG. 4A) and second layer 450 (FIG. 4B) substantially in accord with FIGS. 3A and 3B.
In contrast to the embodiment of FIGS. 3A and 3B, however, additional PCB layers (not shown) are provided and additional vias (402-418 and 452-468) are incorporated into the EMI ground grid (420-424 and 470-474) to permit electrical connectivity between components (e.g., electrical traces and/or devices) in or on the additional PCB layers. It is significant that the additional vias are electrically isolated from the EMI ground grid by annular regions (426-442 and 476-492). This annular (void) region permits the vias to be used to couple traces between the additional PCB layers without interfering with, or being interfered by, the operation of the trackpad sensor. That is, the EMI ground grid acts as a shield to both the trackpad sensor elements and the additional signal vias. One of ordinary skill in the art will recognize that PCBs having more than two layers typically isolate adjacent layers (i.e., formed on the top of a first PCB core and the bottom of a second, adjacent, PCB core) with an insulating material such as, for example, by preimpregnated bonding layer material or "PREPREG."
Notice
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The inventors listed on patent [url=http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=17&f=G&l=50&co1=AND&d=PG01&s1=%22Apple+Computer%22&OS="Apple+Computer"&RS="Apple+Computer"]20060066581[/url] are Benjamin Lyon and Steven P. Hotelling.
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