



More specifically, the present invention relates to a method and an apparatus for reducing power consumption in a processor by reducing voltage supplied to an instruction-processing portion of the processor, while maintaining voltage to other portions of the processor.
According to Apple, one embodiment of the present invention provides a system that facilitates reducing static power consumption of a processor. During operation, the system receives a signal indicating that instruction execution within the processor is to be temporarily halted. In response to this signal, the system halts an instruction-processing portion of the processor, and reduces the voltage supplied to the instruction-processing portion of the processor. Full voltage is maintained to a remaining portion of the processor, so that the remaining portion of the processor can continue to operate while the instruction-processing portion of the processor is in reduced power mode.
The inventor is Lynn R. Youngs.



