



According to Apple, it involves methods and apparatuses for a data processing system are described herein. In one aspect of the invention, an exemplary apparatus includes a chip interconnect, a memory controller for controlling the host memory comprising DRAM memory, the memory controller coupled to the chip interconnect, a scalar processing unit coupled the chip interconnect wherein the scalar processing unit is capable of executing instructions to perform scalar data processing, a vector processing unit coupled the chip interconnect wherein the vector processing unit is capable of executing instructions to perform vector data processing, and an input/output (I/O) interface coupled to the chip interconnect wherein the I/O interface receives/transmits data from/to the scalar and/or vector processing units.
Here's Apple's summary of the invention: "Methods and apparatuses for a data processing system are described herein. In one aspect of the invention, an exemplary apparatus includes a chip interconnect, a memory controller for controlling the host memory comprising DRAM memory, the memory controller coupled to the chip interconnect, a scalar processing unit coupled the chip interconnect wherein the scalar processing unit is capable of executing instructions to perform scalar data processing, a vector processing unit coupled the chip interconnect wherein the vector processing unit is capable of executing instructions to perform vector data processing, and an input/output (I/O) interface coupled to the chip interconnect wherein the I/O interface receives/transmits data from/to the scalar and/or vector processing units.
"In one particular exemplary embodiment, the apparatus includes a general purpose register file used by the scalar processing unit, a vector register file used by the vector processing unit, and a load/store unit being able to execute instructions to load and store data from and to the general purpose register file and the vector register file. Further the chip may include an instruction unit dispatching the instructions to the above functional units to execute. In one embodiment, the chip includes multiple functional units executing instructions simultaneously.
"The present invention includes methods which are performed by these apparatuses, and computer readable media which when executed on a data processing system, causes the system to perform these methods."
The inventors are Sushma Shrikant Trivedi, Joseph P. Bratt, Jack Benkual, Vaughn Todd Arnold and Derek Fujio Iwamoto. The graphic below shows a configuration of a computer system, which may be used by the present invention.




